High-speed counter: control code monitor for channel 1
The data register stores the control code.- Bit 0 = 0/1: Software reset ® no/yes
- Bit 1 = 0/1: Counting ® enable/disable
- Bit 2 = 0/1: Hardware reset ® enabled/disabled
- Bit 3 = 0/1: High-speed counter instruction ® continue/stop (high-speed counter)