Timer with defined period
This is a user-defined function from a system function block. TP_FUN allows you to program a pulse timer with a defined clock period.
Input
clock generator
if a rising edge is detected at start, a clock is generated having the period defined in PT
clock period
16-bit value: 0–327.27s
32-bit value: 0–21,474,836.47s (32-bit value not available for FP3, FPC, FP5, FP10/10S)
resolution 10ms each
a timer having the period PT is caused for each rising edge at start. A new rising edge detected at start within the pulse period does not cause a new timer.
Input/output
Internal memory containing the internal values and states, which corresponds to the instance memory of the associated FB.
Output
signal output
is set for the period of PT as soon as a rising edge is detected at start
elapsed time
contains the elapsed period of the timer. If PT = ET, Q will be reset
The value can be changed during counting operation by writing to the variable from the programming editor.
FP2, FP2SH and FP10SH use a 32-bit value for PT.
Independent of the turn-on period of the start signal, a clock is generated at the output Q having a length defined by PT. The function TP_FUN is triggered if a rising edge is detected at the input start.
A rising edge at the input start does not have any influence during the processing of PT.