Unit_AnalogInOut_FPG_A44

Function to write to and read from FPG-A44 unit

This function writes digital data to the analog output channels of the analog unit and reads converted digital data from its analog input channels. The digital values to be converted and output as analog values are specified at iOutChannel0 to iOutChannel3. The converted digital values from the analog unit are stored per channel in the output variables iInChannel0 to iInChannel3.

The input and output type (voltage or current) is also set with this function.

Parameters

Input

iSlotNumber (INT)

Specify the slot number.

iOutChannel0 to iOutChannel3 (INT)

Set the digital value to be converted and output by the analog unit.

bSetInChannel0ToCurrent to bSetInChannel3ToCurrent (BOOL)

Set voltage or current input for each channel number.

TRUE: Current input
FALSE: Voltage input

bSetOutChannel0ToCurrent to bSetOutChannel3ToCurrent (BOOL)

Set voltage or current output for each channel number.

TRUE: Current output
FALSE: Voltage output

Output

uiInChannel0 to uiInChannel3 (UINT): Returns the converted digital data from the analog unit by channel.

Wiring diagram

(1) Output
(2) Internal connection
(3) Input

D/A conversion

Voltage output		Current output
Digital value (INT)	Analog value	Digital value (INT)	Analog value
4095	10V	4095	20mA
2048	5V	2048	12mA
0	0V	0	4mA
-2048	-5V
-4095	-10V

A/D conversion

Voltage input		Current input
Digital value (UINT)	Analog value	Digital value (UINT)	Analog value
65535	10V	65535	20mA
32768	5V	39321	12mA
0	0V	13107	4mA
		0	0

Example

POU header

All input and output variables used for programming this function have been declared in the POU header.

The same POU header is used for all programming languages.

	VAR
		iOutChannel0: INT:=0;
		iOutChannel1: INT:=0;
		iOutChannel2: INT:=0;
		iOutChannel3: INT:=0;
		bSetInChannel0ToCurrent: BOOL:=FALSE;
		bSetOutChannel0ToCurrent: BOOL:=FALSE;
		bSetInChannel1ToCurrent: BOOL:=FALSE;
		bSetInChannel2ToCurrent: BOOL:=FALSE;
		bSetInChannel3ToCurrent: BOOL:=FALSE;
		bSetOutChannel1ToCurrent: BOOL:=FALSE;
		bSetOutChannel2ToCurrent: BOOL:=FALSE;
		bSetOutChannel3ToCurrent: BOOL:=FALSE;
		uiInChannel0: UINT:=0;
		uiInChannel1: UINT:=0;
		uiInChannel2: UINT:=0;
		uiInChannel3: UINT:=0;
END_VAR

LD body

BODY
    WORKSPACE
        NETWORK_LIST_TYPE := NWTYPELD ;
        ACTIVE_NETWORK := 1 ;
    END_WORKSPACE
    NET_WORK
        NETWORK_TYPE := NWTYPELD ;
        NETWORK_LABEL :=  ;
        NETWORK_TITLE :=  ;
        NETWORK_HEIGHT := 16 ;
        NETWORK_BODY
B(B_F,Unit_AnalogInOut_FPG_A44!,,14,1,29,16,,?DiOutChannel0?DiOutChannel1?DiOutChannel2?DiOutChannel3?DiSlotNumber?DbSetInChannel0ToCurrent?DbSetInChannel1ToCurrent?DbSetInChannel2ToCurrent?DbSetInChannel3ToCurrent?DbSetOutChannel0ToCurrent?DbSetOutChannel1ToCurrent?DbSetOutChannel2ToCurrent?DbSetOutChannel3ToCurrent?AuiInChannel0?AuiInChannel1?AuiInChannel2?AuiInChannel3);
B(B_VARIN,,iOutChannel0,12,2,14,4,);
B(B_VARIN,,iOutChannel1,12,3,14,5,);
B(B_VARIN,,iOutChannel2,12,4,14,6,);
B(B_VARIN,,iOutChannel3,12,5,14,7,);
B(B_VARIN,,4,12,6,14,8,);
B(B_VARIN,,bSetInChannel0ToCurrent,12,7,14,9,);
B(B_VARIN,,bSetInChannel1ToCurrent,12,8,14,10,);
B(B_VARIN,,bSetInChannel2ToCurrent,12,9,14,11,);
B(B_VARIN,,bSetInChannel3ToCurrent,12,10,14,12,);
B(B_VARIN,,bSetOutChannel0ToCurrent,12,11,14,13,);
B(B_VARIN,,bSetOutChannel1ToCurrent,12,12,14,14,);
B(B_VARIN,,bSetOutChannel2ToCurrent,12,13,14,15,);
B(B_VARIN,,bSetOutChannel3ToCurrent,12,14,14,16,);
B(B_VAROUT,,uiInChannel0,29,2,31,4,);
B(B_VAROUT,,uiInChannel1,29,3,31,5,);
B(B_VAROUT,,uiInChannel2,29,4,31,6,);
B(B_VAROUT,,uiInChannel3,29,5,31,7,);
L(1,0,1,16);
        END_NETWORK_BODY
    END_NET_WORK
    NET_WORK
        NETWORK_TYPE := NWTYPELD ;
        NETWORK_LABEL :=  ;
        NETWORK_TITLE :=  ;
        NETWORK_HEIGHT := 5 ;
        NETWORK_BODY
L(1,0,1,5);
        END_NETWORK_BODY
    END_NET_WORK
    NET_WORK
        NETWORK_TYPE := NWTYPELD ;
        NETWORK_LABEL :=  ;
        NETWORK_TITLE :=  ;
        NETWORK_HEIGHT := 5 ;
        NETWORK_BODY
L(1,0,1,5);
        END_NETWORK_BODY
    END_NET_WORK
END_BODY

ST body

Unit_AnalogInOut_FPG_A44(iOutChannel0 := iOutChannel0,
                        iOutChannel1 := iOutChannel1,
                        iOutChannel2 := iOutChannel2,
                        iOutChannel3 := iOutChannel3,
                        iSlotNumber := 4,
                        bSetInChannel0ToCurrent := bSetInChannel0ToCurrent,
                        bSetInChannel1ToCurrent := bSetInChannel1ToCurrent,
                        bSetInChannel2ToCurrent := bSetInChannel2ToCurrent,
                        bSetInChannel3ToCurrent := bSetInChannel3ToCurrent,
                        bSetOutChannel0ToCurrent := bSetOutChannel0ToCurrent,
                        bSetOutChannel1ToCurrent := bSetOutChannel1ToCurrent,
                        bSetOutChannel2ToCurrent := bSetOutChannel2ToCurrent,
                        bSetOutChannel3ToCurrent := bSetOutChannel3ToCurrent,
                        uiInChannel0 => uiInChannel0,
                        uiInChannel1 => uiInChannel1,
                        uiInChannel2 => uiInChannel2,
                        uiInChannel3 => uiInChannel3);